Embedded Systems

Parallel processing techniques for compilers have been extensively researched in the past decades. More recent is the work done in the context of back-end compilers for SubWord Parallelism (SLP). This paper analyzes two state of the art compilers and exposes their main problems with respect to SLP code generation, for code dominated by background data. We suggest some ways to overcome these problems and their potential benefits are analyzed. As a fundamental part of our proposed solution direction, we also describe the strong interaction between background and foreground data format organization in the context of energy and performance focusing on two cost factors inherent to SLP, reordering overhead due to subword communication on the one hand and data padding in the data memory on the other hand. To our knowledge, these problems that we identify have been ignored both in the academia and in the industrial compiler support. Nevertheless, they have a high impact on the main cost metrics of the design space, especially for data dominated embedded applications. Results show that our approach significantly improves the SLP code generation of both the Intel and Larsen compilers.