Internal parallelization of data-driven virtual hardware

WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations.

[1]  Yuichiro Shibata,et al.  HOSMII: A Virtual Hardware Integrated with DRAM , 1998, IPPS/SPDP Workshops.

[2]  Yuichiro Shibata,et al.  Reconfigurable systems: activities in Asia and South Pacific , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[3]  Steven Trimberger,et al.  A time-multiplexed FPGA , 1997, Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom Computing Machines Cat. No.97TB100186).

[4]  Peter Y. K. Cheung,et al.  Area and time limitations of FPGA-based virtual hardware , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[5]  E. Tau,et al.  A First Generation DPGA implementation , 1995 .

[6]  Motomura,et al.  An Embedded DRAM-FPGA Chip With Instantaneous Logic Reconfiguration , 1997 .

[7]  Toshiaki Miyazaki Reconfigurable systems: a survey , 1998, Proceedings of 1998 Asia and South Pacific Design Automation Conference.

[8]  Hideharu Amano,et al.  WASMII: a data driven computer on a virtual hardware , 1993, [1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines.