Power Optimization Methodology for Ultralow Power Microcontroller With Silicon on Thin BOX MOSFET

In this brief, a practical power optimization method that calculates the optimal power supply and body bias voltages, for a given target operational frequency and a temperature, is proposed and evaluated. The proposed optimization method is based upon a simple power model in which several coefficients for leakage power, switching power, temperature, and operational frequency are obtained from accurate real chip measurements. The calculated optimal-voltage settings by the proposed model can achieve minimum accuracies of 93.8%, 91.6%, and 79.5% for room-temperature, 50 °C, and 65 °C, respectively. Since the proposed methodology is based on well-known power formulas, it can be applied to the latest FD-SOI technologies.

[1]  Hideharu Amano,et al.  A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode , 2015 .

[2]  Kimiyoshi Usami,et al.  Measurement of the minimum energy point in Silicon on Thin-BOX(SOTB) and bulk MOSFET , 2015, EUROSOI-ULIS 2015: 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon.

[3]  Lawrence T. Pileggi,et al.  Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection , 2009, ISLPED.

[4]  A.P. Chandrakasan,et al.  A 175 mV multiply-accumulate unit using an adaptive supply voltage and body bias (ASB) architecture , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

[5]  David Harris,et al.  CMOS VLSI Design: A Circuits and Systems Perspective , 2004 .

[6]  A. Wang,et al.  Modeling and sizing for minimum energy operation in subthreshold circuits , 2005, IEEE Journal of Solid-State Circuits.

[7]  Trevor Mudge,et al.  MiBench: A free, commercially representative embedded benchmark suite , 2001 .

[8]  Pascal Benoit,et al.  Power management through DVFS and dynamic body biasing in FD-SOI circuits , 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

[9]  A. R. Newton,et al.  Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas , 1990 .

[10]  Hideharu Amano,et al.  Body bias control for a coarse grained reconfigurable accelerator implemented with Silicon on Thin BOX technology , 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

[11]  Niraj K. Jha,et al.  Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems , 2003, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[12]  Nobuyuki Sugii,et al.  Ultralow-power LSI Technology with Silicon on Thin Buried Oxide (SOTB) CMOSFET , 2010 .

[13]  Kaushik Roy,et al.  ABRM: Adaptive $ \beta$-Ratio Modulation for Process-Tolerant Ultradynamic Voltage Scaling , 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[14]  O. Yadid-Pecht,et al.  Leakage Reduction in Advanced Image Sensors Using an Improved ${\rm AB}^{2}{\rm C}$ Scheme , 2012, IEEE Sensors Journal.

[15]  Hideharu Amano,et al.  A Thermal Management System for Building Block Computing Systems , 2014, 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs.

[16]  Hideharu Amano,et al.  An optimal power supply and body bias voltage for a ultra low power micro-controller with silicon on thin box MOSFET , 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).