Comparative Study of Single Phase PLL Algorithms for Grid Synchronization Applications

Phase Locked Loop is a control system technique that is used extensively for synchronization purposes in diverse fields, most importantly in communication systems and in power electronics. Owing to its significance, the PLL has been a subject of great interest and various schemes and their improvements have been proposed for its implementation. This paper serves to elaborate on and compare the performance of four prevalent PLL schemes, the Zero Crossing Detector based PLL, Inverse Park based PLL, Second Order Generalized Integrator based PLL and the Enhanced Phase Locked Loop. The Zero Crossing Detector based PLL detects the phase error between its output and the reference at every zero crossing and corrects for it. The Inverse Park PLL and the SOGI PLL differ only in the way they generate the orthogonal signals that are fed to the phase detector. The Enhanced PLL is based on the Adaptive Filter theory.