A 0.13-/spl mu/m CMOS Ultra-Low Power Front-End Receiver for Wireless Sensor Networks

This paper presents an ultra-low power monolithic CMOS RF receiver, consisting of current re-use common gate LNA with inductive feedback gm-boosting, and followed by balanced I/Q mixers. The receiver is fabricated in a 0.13-mum CMOS digital process operating at 2.45 GHZ. The measurement results show that the RF receiver achieves a gain of 20 dB and a noise figure of 7.5 dB at 2 MHz. Input 1-dB compression point is -19 dBm and IIP3 is -10 tlBm, with 0.4 mA total current consumption from a 1.5-V supply.

[1]  R. Castello,et al.  A 2-dB noise figure 900-MHz differential CMOS LNA , 2001 .

[2]  Wooi Gan Yeoh,et al.  A 2.4-GHz CMOS RF front-end for wireless sensor network applications , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

[3]  X Li,et al.  Gm-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-μm CMOS , 2005 .

[4]  T. Ohguro,et al.  The impact of scaling down to deep-submicron on CMOS RF circuits , 1998, Proceedings of the 23rd European Solid-State Circuits Conference.

[5]  J. Ryynanen,et al.  2.4-GHz receiver for sensor applications , 2005, IEEE Journal of Solid-State Circuits.

[6]  J. Ryynanen,et al.  2.4-GHz receiver for sensor applications , 2004, Proceedings of the 30th European Solid-State Circuits Conference.

[7]  Songcheol Hong,et al.  A 2.4-GHz sub-mW CMOS receiver front-end for wireless sensors network , 2006 .

[8]  D.J. Allstot,et al.  G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS , 2005, IEEE Journal of Solid-State Circuits.

[9]  Karsten P. Ulland,et al.  Vii. References , 2022 .