A level shifter circuit design by using input/output voltage monitoring technique for ultra-low voltage digital CMOS LSIs

In this paper, we propose a level shifter circuit capable with a wide input voltage range. The circuit is based on a conventional two-stage comparator, and has a distinctive feature in current generation scheme by monitoring input and output logic levels. The proposed circuit can convert low voltage input digital signals into high voltage output digital signals. The circuit achieves low power operation because it dissipates operating current only when the input signals change. A SPICE demonstrated that the circuit can convert low voltage signals of 0.4-V into 3 V. The power dissipation was 6 nW at 0.4-V and 1-kHz input pulse. The circuit is useful for an ultra-low voltage digital circuit system co-existing with high voltage digital circuit systems.

[1]  Dennis Sylvester,et al.  Single stage static level shifter design for subthreshold to I/O voltage conversion , 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

[2]  Kyeong-Sik Min,et al.  Fast-Delay and Low-Power Level Shifter for Low-Voltage Applications , 2007, IEICE Trans. Electron..

[3]  Borivoje Nikolic,et al.  Level conversion for dual-supply systems , 2004 .

[4]  Low energy level converter design for sub-Vth logics , 2009, 2009 Asia and South Pacific Design Automation Conference.

[5]  Marcel J. M. Pelgrom,et al.  Matching properties of MOS transistors , 1989 .

[6]  K. Tanaka,et al.  Level converters with high immunity to power-supply bouncing for high-speed sub-1-V LSIs , 2000, 2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103).

[7]  Stephan Henzler.  Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies (Springer Series in Advanced Microelectronics) , 2006 .

[8]  Anantha Chandrakasan,et al.  Sub-threshold Design for Ultra Low-Power Systems , 2006, Series on Integrated Circuits and Systems.

[9]  Kaushik Roy,et al.  Robust Level Converter Design for Sub-threshold Logic , 2006, ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design.