Enabling Energy-Efficient Nonvolatile Computing With Negative Capacitance FET

Negative capacitance FETs (NCFETs) have attracted significant interest due to their steep-switching capability at a low voltage and the associated benefits for implementing energy-efficient Boolean logic. While most existing works aim to avoid the <inline-formula> <tex-math notation="LaTeX">${I}_{D}$ </tex-math></inline-formula>–<inline-formula> <tex-math notation="LaTeX">${V}_{G}$ </tex-math></inline-formula> hysteresis in NCFETs, this paper exploits this hysteresis feature for logic-memory synergy and presents a custom-designed nonvolatile NCFET D flip-flop (DFF) that maintains its state during power outages. This paper also presents an NCFET fabricated for this purpose, showing <10 mV/decade steep hysteresisedges and high, up to seven orders inmagnitude, <inline-formula> <tex-math notation="LaTeX">${R}_{\text {DS}}$ </tex-math></inline-formula> ratio between the two polarization states. With a device-circuit codesign that takes advantage of the embedded nonvolatility and the high <inline-formula> <tex-math notation="LaTeX">${R}_{\text {DS}}$ </tex-math></inline-formula> ratio, the proposed DFF consumes negligible static current in backup and restore operations, and remains robust even with significant global and local ferroelectric material variations across a wide 0.3–0.8 V supply voltage range. Therefore, the proposed DFF achieves energy-efficient and low-latency backup and restore operations. Furthermore, it has an ultralow energy-delay overhead, below 2.1% in normal operations, and operates using the same voltage supply as the Boolean logic elements with which it connects. This promises energy-efficient nonvolatile computing in energy-harvesting and power-gating applications.

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