A novel low-voltage biasing scheme for double gate FBC achieving 5s retention and 1016 endurance at 85°C

We demonstrate a novel low-voltage biasing scheme on ultra-thin BOX (UTBOX) FDSOI floating body cells with L<inf>g</inf>=55nm and t<inf>Si</inf>=20nm. By optimizing the front and back gate biasing to enhance the positive feedback loop, the required V<inf>DS</inf> can be reduced to 1.5V while retention times as high as 5s can still be achieved at 85°C. For the first time, we also show that the stringent endurance spec of 10¹⁶ cycles can be met as a result of the V<inf>DS</inf> reduction.