Implementation of the Pattern Matching System to Detect Flip Chip PCB Defects

FPGA-based Pattern Matching System, which supports a Camera Link (Medium), was used to detect Flip Chip PCB defect patterns. For the automation of the vision inspection of the Flip Chip PCB production process, the system was optimized by implementing the vision library in IP, which is used to produce high speed processing FPGA-based systems and to detect defect patterns. The implemented IPs comprised of Pattern Matching IP, VGA Control IP, Memory Control IP and Parallel Processing MAD Pattern Matching IP. Xilinx was used to process the image transmitted in high speed from Digital Camera, Vertex-4 type 1.6 million gate FPGA chip. It allowed the processing of 4Tap (2352(H) * 1728(V) *8Bit) image data transmitted from the camera without the need for a separate Frame Grabber Board[5] in the FPGA. In addition, it could check the 1Tap(588(H) * 1728(V) *8bit) image data on a PC via USB transmission out of 4 Taps. For pattern matching, it abstracted a 256*256 area out of the 1Tap image, transmitted the image to each IP and displayed the Pattern Matching output result on a 7inch TFT-LCD.