Bringing High-Performance Reconfigurable Computing to Exact Computations

Numerical non-robustness is a recurring phenomenon in scientific computing. It is primarily caused by numerical errors arising because of fixed-precision arithmetic in integer and/or floating-point computations. Exact computation, based on arbitrary-precision arithmetic, has been developed over the last decade as an emerging numerical computation paradigm in response to this problem of numerical non-robustness. Exact arithmetic, specifically arbitrary-precision arithmetic, has been traditionally implemented using efficient software libraries such as GNU multi-precision (GMP). However, this results in a slower arithmetic performance when compared to fixed-precision arithmetic. In this paper we present a first effort, to the best of our knowledge, of reconfigurable hardware support for arbitrary-precision arithmetic. The proposed hardware architectures are based on virtual convolution scheduling which is derived from a formal representation of the problem. Targeting high performance and efficiency, dynamic (non-linear) pipelines techniques were exploited to eliminate the effects of deeply-pipelined operators. Referenced to GMP, our experiments showed promising results.

[1]  Terry A. Welch,et al.  High-speed buffering for variable length operands , 1977, ISCA '77.

[2]  Chen Li,et al.  Exact Geometric Computation: Theory and Applications , 2001 .

[3]  Donald E. Knuth,et al.  The art of computer programming. Vol.2: Seminumerical algorithms , 1981 .

[4]  Donald Ervin Knuth,et al.  The Art of Computer Programming , 1968 .

[5]  S. K. Nandy,et al.  Arbitrary precision arithmetic-SIMD style , 1998, Proceedings Eleventh International Conference on VLSI Design.

[6]  Kris Gaj,et al.  High-throughput reconfigurable computing: design and implementation of an IDEA encryption cryptosystem on the SRC-6E reconfigurable computer , 2005, International Conference on Field Programmable Logic and Applications, 2005..

[7]  Stephan Olariu,et al.  How to Sort N Items Using a Sorting Network of Fixed I/O Size , 1999, IEEE Trans. Parallel Distributed Syst..

[8]  Kai Hwang,et al.  Advanced computer architecture - parallelism, scalability, programmability , 1992 .

[9]  Viktor K. Prasanna,et al.  High-performance and area-efficient reduction circuits on FPGAs , 2005, 17th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'05).

[10]  Kris Gaj,et al.  High-Throughput Reconfigurable Computing: A Design Study of an IDEA Encryption Cryptosystem on the SRC-6e Reconfigurable Computer. , 2005 .

[11]  Donald M. Chiarulli,et al.  DRAFT: A dynamically reconfigurable processor for integer arithmetic , 1985, 1985 IEEE 7th Symposium on Computer Arithmetic (ARITH).

[12]  Viktor K. Prasanna,et al.  High-Performance Reduction Circuits Using Deeply Pipelined Operators on FPGAs , 2007, IEEE Transactions on Parallel and Distributed Systems.

[13]  J. Dongarra,et al.  Exploiting the Performance of 32 bit Floating Point Arithmetic in Obtaining 64 bit Accuracy (Revisiting Iterative Refinement for Linear Systems) , 2006, ACM/IEEE SC 2006 Conference (SC'06).

[14]  Chee Yap,et al.  The exact computation paradigm , 1995 .

[15]  A. Saha,et al.  Design and FPGA implementation of efficient integer arithmetic algorithms , 1993, Proceedings of Southeastcon '93.

[16]  Tarek A. El-Ghazawi,et al.  Wavelet spectral dimension reduction of hyperspectral imagery on a reconfigurable computer , 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).

[17]  David Thomas,et al.  The Art in Computer Programming , 2001 .

[18]  Tarek A. El-Ghazawi,et al.  Prototyping automatic cloud cover assessment (ACCA) algorithm for remote sensing on-board processing on a reconfigurable computer , 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

[19]  Peter L. Montgomery,et al.  Division by invariant integers using multiplication , 1994, PLDI '94.

[20]  Bin Cong,et al.  Scalable Parallel Computing: Technology, Architecture, Programming , 1999, Scalable Comput. Pract. Exp..

[21]  Chee-Keng Yap,et al.  Complexity Analysis of Algorithms in Algebraic Computation , 2006 .

[22]  Javier Hormigo,et al.  CORDIC Processor for Variable-Precision Interval Arithmetic , 2004, J. VLSI Signal Process..

[23]  George Ferizis,et al.  Mapping Basic Recursive Structures to Runtime Reconfigurable Hardware , 2004, FPL.