A 65-nm CMOS Constant Current Source With Reduced PVT Variation

This paper presents a new nanometer-based low-power constant current reference that attains a small value in the total process–voltage–temperature variation. The circuit architecture is based on the embodiment of a process-tolerant bias current circuit and a scaled process-tracking bias voltage source for the dedicated temperature-compensated voltage-to-current conversion in a preregulator loop. Fabricated in a UMC 65-nm CMOS process, it consumes <inline-formula> <tex-math notation="LaTeX">$7.18~\mu \text{W}$ </tex-math></inline-formula> with a 1.4 V supply. The measured results indicate that the current reference achieves an average temperature coefficient of 119 ppm/°C over 12 samples in a temperature range from −30 °C to 90 °C without any calibration. Besides, a low line sensitivity of 180 ppm/V is obtained. This paper offers a better sensitivity figure of merit with respect to the reported representative counterparts.

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