Improved circuit technique to reduce h/sub fe/ degradation in bipolar output drivers
暂无分享,去创建一个
[1] I. Sakai,et al. A new BiCMOS gate array cell with diode connected bipolar driver , 1990, Proceedings on Bipolar Circuits and Technology Meeting.
[2] J. D. Burnett,et al. Modeling hot-carrier effects in polysilicon emitter bipolar transistors , 1988 .
[3] I. C. Kizilyalli,et al. Degradation of gain in bipolar transistors , 1994 .
[4] Lawrence T. Clark,et al. High fan-in circuit design , 1996 .
[5] D. R. Collins,et al. h FE degradation due to reverse bias emitter-base junction stress , 1969 .
[6] J. W. Osenbach,et al. A 0.8-/spl mu/m BiCMOS technology for ASIC applications , 1993, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '93.