Supporting High Level Language Semantics within Hardware Resident Threads
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Jim Stevens | Wesley Peck | Erik K. Anderson | Jason Agron | Fabrice Baijot | David L. Andrews | Seth Warn
[1] Jim Stevens,et al. Run-Time Services for Hybrid CPU/FPGA Systems on Chip , 2006, 2006 27th IEEE International Real-Time Systems Symposium (RTSS'06).
[2] Jim Stevens,et al. Enabling a Uniform Programming Model Across the Software/Hardware Boundary , 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.
[3] Paolo Ienne,et al. Seamless hardware-software integration in reconfigurable computing systems , 2005, IEEE Design & Test of Computers.
[4] Paul R. Wilson,et al. Dynamic Storage Allocation: A Survey and Critical Review , 1995, IWMM.
[5] Ahmed Amine Jerraya,et al. Hardware/software interface codesign for embedded systems , 2005, Computer.
[6] Giovanni De Micheli,et al. Resolution of dynamic memory allocation and pointers for the behavioral synthesis form C , 2000, DATE '00.
[7] Miljan Vuletic,et al. Unifying software and hardware of multithreaded reconfigurable applications within operating system processes , 2006 .
[8] Seth Copen Goldstein,et al. PipeRench: a co/processor for streaming multimedia acceleration , 1999, ISCA.
[9] Pedro C. Diniz,et al. A compiler approach to fast hardware design space exploration in FPGA-based systems , 2002, PLDI '02.
[10] D. Andrews,et al. hthreads: a hardware/software co-designed multithreaded RTOS kernel , 2005, 2005 IEEE Conference on Emerging Technologies and Factory Automation.
[11] Peter J. Ashenden,et al. Programming models for hybrid FPGA-cpu computational components: a missing link , 2004, IEEE Micro.
[12] David J. Lau,et al. Automated Generation of Hardware Accelerators with Direct Memory Access from ANSI/ISO Standard C Functions , 2006, 2006 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.
[13] John Wawrzynek,et al. The Garp Architecture and C Compiler , 2000, Computer.