High Mobility Non-Hydrogenated Low Temperature Polysilicon TFTs

We have fabricated polysilicon (poly-Si) thin film transistors (TFTs) using a standard 4-mask sequence, with self-aligned ion implantation for source and drain doping. The active layer was obtained by solid phase crystallisation of high purity Si 2 H 6 -deposited amorphous Si, whereas the gate oxide was synthesised by a novel plasma deposition technique, namely distributed electron cyclotron resonance plasma enhanced chemical vapour deposition (DECR PECVD). We have obtained high carrier mobilities (70 cm 2 V −1 s −1 for electrons and 40 cm 2 V −1 s −1 for holes) with an excellent uniformity and without the need for a post-hydrogenation treatment. Moreover, we show that the TFT characteristics are practically insensitive to hot carrier effects.