Implementation of digital IF receiver based on SDR using DSP builder

A digital IF receiver is researched based on the idea of Software defined radio in this paper. The receiver includes numerical controlled oscillator(NCO), Digital Down Conversion(DDC) and the modem in a Wireless Spread Spectrum Communication system. Firstly the DDC module which include CIC (cascaded-integrator-com) and HBF(half band filter) is implemented through DSP builder, ASIC (application specific integrated circuit) design flow and verified using a FPGA (field programmable gate array) board. Then the coherent demodulation of QPSK based on COSTAS loop is researched and designed in FPGA using modern DSP technology.