An Integrated Structure–Material Optimization Strategy for the Packaging of High-Voltage Insulated Gate Bipolar Transistors

High-voltage insulated gate bipolar transistors (IGBTs), such as silicon carbide (SiC)-based ones, are promising as wide bandgap (WBG) power modules. However, current IGBT packaging methods are unsuitable for high-voltage applications due to excessive electric field stress, which increases the risk of partial discharge or electrical breakdown, compromising their insulating property; a new packaging solution is, therefore, needed. In this study, an integrated structure–material optimization strategy through the combination of the finite-element method (FEM) and materials optimization is proposed to reduce the maximum electric field stress (<inline-formula> <tex-math notation="LaTeX">${E}_{\text {max}}$ </tex-math></inline-formula>) at the triple junction, i.e., the interface of the ceramic substrate, the metal electrode, and the polymer-based encapsulation, of an IGBT. In epoxy resin encapsulation, it was determined that a symmetrical and chamfered electrode structure with a smooth transition at the triple junction reduces <inline-formula> <tex-math notation="LaTeX">${E}_{\text {max}}$ </tex-math></inline-formula> from near 280 to 40 kV/mm at an operating voltage of 27.5 kV. Furthermore, when the permittivities of the substrate (AlN) and encapsulation materials (BaTiO3–resin composites) satisfy an optimal ratio, <inline-formula> <tex-math notation="LaTeX">${E}_{\text {max}}$ </tex-math></inline-formula> can be further reduced to 34 kV/mm (a 15% decrease). These results indicate that the integrated structure–material optimization strategy effectively enhances the insulating property of the high-voltage IGBTs.