A PFM-Based Digital Pixel With an Off-Pixel Residue Measurement for Small Pitch FPAs

Digital pixels based on pulse frequency modulation employ counting techniques to achieve a very high charge-handling capability compared to their analog counterparts. Moreover, extended counting methods that make use of leftover charge (residue) on the integration capacitor help to improve the noise performance of these pixels. However, focal plane arrays with small pixel pitch are constrained in terms of pixel area, which makes it difficult to benefit from in-pixel extended counting circuitry. Thus, in this brief the authors propose a novel approach to measure the residue outside the pixel using an analog-to-digital converter (ADC). A first prototype of the proposed pixel, in the form of a testbed, has been developed. It is aimed at medium-wave infrared imaging arrays that have a small pixel pitch. The prototype is composed of a pixel front end, a 12-bit successive approximation register ADC, a counter, and a comparator. The front end is a modified version of the conventional design and has been designed and fabricated in 90-nm CMOS, whereas off-the-shelf discrete components have been used to implement the ADC, comparator, and counter. A measured signal-to-noise ratio at low illumination levels is 55 dB.

[1]  Stephen W. Kennerly,et al.  Dual-band QWIP MWIR/LWIR focal plane array test results , 2000, Defense, Security, and Sensing.

[2]  R. Hornsey,et al.  Analysis of Dynamic Range, Linearity, and Noise of a Pulse-Frequency Modulation Pixel , 2012, IEEE Transactions on Electron Devices.

[3]  Y. Chen,et al.  A new wide dynamic range CMOS pulse-frequency-modulation digital image sensor with in-pixel variable reference voltage , 2008, 2008 51st Midwest Symposium on Circuits and Systems.

[4]  Patrick Maillart,et al.  A 25μm pitch LWIR staring focal plane array with pixel-level 15-bit ADC ROIC achieving 2mK NETD , 2010, Security + Defence.

[5]  Xiaojin Zhao,et al.  A CMOS digital pixel sensor with photo-patterned micropolarizer array for real-time focal-plane polarization imaging , 2008, 2008 IEEE Biomedical Circuits and Systems Conference.

[6]  Melik Yazici,et al.  A new digital readout integrated circuit (DROIC) with pixel parallel A/D conversion and reduced quantization noise , 2014 .

[7]  Hee Chul Lee,et al.  Multiple integration method for a high signal-to-noise ratio readout integrated circuit , 2005, IEEE Trans. Circuits Syst. II Express Briefs.

[8]  Bertrand Misischi,et al.  Low-Power and Compact CMOS APS Circuits for Hybrid Cryogenic Infrared Fast Imaging , 2007, IEEE Transactions on Circuits and Systems II: Express Briefs.

[9]  R. Hornsey,et al.  A Quad-Sampling Wide-Dynamic-Range Pulse-Frequency Modulation Pixel , 2013, IEEE Transactions on Electron Devices.

[10]  Hee Chul Lee,et al.  Novel current-mode background suppression for 2-D LWIR applications , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.

[11]  Francisco Serra-Graells,et al.  A 2 kfps Sub-µW/Pix Uncooled-PbSe Digital Imager With 10 Bit DR Adjustment and FPN Correction for High-Speed and Low-Cost MWIR Applications , 2015, IEEE Journal of Solid-State Circuits.