Application and analysis of rt-level software-based self-testing for embedded processor cores

Embedded processor testing techniques based on the execution of self-test routines, have been recently proposed as an effective alternative to classical hardware Built-In Self Test. Software-based self-testing provides atspeed testing capability and does not add hardware or performance penalties. It efficiently partitions the testing task between external testers and internal processor resources. In this paper we analyze the application of a softwarebased self-testing methodology to different implementations of a complex embedded processor architecture. We demonstrate that such a methodology provides high test quality in different processor implementations with low test development and low test application costs.