We propose an integrated neuron circuit for an asynchronous pulse neural network model. This circuit is suitable for an implementation of a wide range of spatio-temporal coding networks since the circuit can function as both a coincidence detector and an integrator of the input pulses by properly setting bias voltage. We fabricate a prototype chip for the proposed circuit using MOSIS HP/Agilient 0.5 /spl mu/m CMOS semiconductor process. The experimental measurements from the chip confirm that the integrated neuron circuit qualitatively replicates the behavior of the model. Especially, coincidence detection of input pulses in a short-time window, and further, complex behavior including chaos in the internal state value and in the interspike intervals of the output pulses are illustrated.
[1]
Kazuyuki Aihara,et al.
Pulse propagation networks: A neural network model that uses temporal coding by action potentials
,
1993,
Neural Networks.
[2]
Kazuyuki Aihara,et al.
Asynchronous Pulse Neural Network Model for VLSI Implementation (Special Section on Nonlinear Theory and Its Applications)
,
1998
.
[3]
Kazuyuki Aihara,et al.
Dynamical Cell Assembly Hypothesis -- Theoretical Possibility of Spatio-temporal Coding in the Cortex
,
1996,
Neural Networks.
[4]
F Bezanilla,et al.
Nerve membrane excitation without threshold.
,
1970,
Proceedings of the National Academy of Sciences of the United States of America.