4.4 A 197mW 70ms-latency full-HD 12-channel video-processing SoC for car information systems
暂无分享,去创建一个
Toshihiro Hattori | Takahiro Irita | Keisuke Matsumoto | Hirotaka Hara | Kenichi Iwata | Seiji Mochizuki | Katsushige Matsubara | Chi Lan Phuong Nguyen | Tetsuya Shibayama | Katsuya Mizumoto
[1] Chih-Cheng Chen,et al. 10.3 heterogeneous multi-processing quad-core CPU and dual-GPU design for optimal performance, power, and thermal tradeoffs in a 28nm mobile application processor , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).
[2] Mohit Sharma,et al. A true multistandard, programmable, low-power, full HD video-codec engine for smartphone SoC , 2012, 2012 IEEE International Solid-State Circuits Conference.
[3] Keiji Matsumoto,et al. A 342mW mobile application processor with full-HD multi-standard video codec , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.
[4] Makoto Takahashi,et al. A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm , 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).
[5] Anantha Chandrakasan,et al. A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.
[6] Lien-Fei Chen,et al. 18.6 A 0.5nJ/pixel 4K H.265/HEVC codec LSI for multi-format smartphone applications , 2015, 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers.