In this paper, a new type of combinational logic circuit realization is presented. Logic values are implemented as sinusoidal signals. Sinusoidal signals of the same frequency are phase shifted by π to destructively interfere with each other, and represent the logic 0 and 1 values of Boolean Logic. These properties of sinusoids can be used to identify a signal without ambiguity. Thus, representing logic values as sinusoidal signals yields a realizable system of logic. The paper presents a logic gate family that can operate using the sinusoidal signals for logic 0 and logic 1 values. Due to orthogonality of sinusoid signals with different frequencies, multiple sinusoids could be transmitted on a single wire. This provides a natural way of implementing multilevel logic. Signals traveling long distances could take advantage of this fact and can share interconnect lines. Recent research in circuit design has made it possible to harvest sinusoidal signals of the same frequency and 180° phase difference from a single resonant clock ring in a distributed manner. Other advantage of such a logic family is its immunity from external additive noise. The experiments in this paper indicate that this paradigm, when used to implement binary valued logic, yields an improvement in switching (dynamic) power.
[1]
Sunil P. Khatri,et al.
Clock Distribution Scheme using Coplanar Transmission Lines
,
2008,
2008 Design, Automation and Test in Europe.
[2]
Sunil P. Khatri,et al.
A PLL design based on a standing wave resonant oscillator
,
2009,
2009 IEEE International Conference on Computer Design.
[3]
Laszlo B. Kish.
Noise-based logic: Binary, multi-valued, or fuzzy, with optional superposition of logic states
,
2009
.
[4]
Hiroaki Takagi,et al.
Biologically-inspired stochastic vector matching for noise-robust information processing
,
2008
.
[5]
Laszlo B. Kish,et al.
Thermal noise driven computing
,
2006,
physics/0607007.
[6]
C. Patrick Yue,et al.
Design of a 10GHz clock distribution network using coupled standing-wave oscillators
,
2003,
Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).
[7]
Laszlo B. Kish,et al.
Noise-based logic hyperspace with the superposition of 2N states in a single wire
,
2009,
0901.3947.