Design methodology and CAD tools for the NVAX microprocessor

The design and verification of the NVAX microprocessor are described. Full-custom circuit and layout techniques were required to achieve the target cycle time, and the design had to be completed as quickly as possible to meet time-to-market requirements. A structured design methodology and several novel proprietary CAD tools were used to develop the full custom chip from a textual specification to tape out in 20 months. First silicon booted the VMS operating system, worked in symmetric multiprocessing system configurations, and operated at 83.3 MHz under worst-case operating conditions.<<ETX>>

[1]  Joel Grodstein,et al.  Timing verification on a 1.2M-device full-custom CMOS design , 1991, 28th ACM/IEEE Design Automation Conference.

[2]  Antun Domic,et al.  CLEO: a CMOS layout generator , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[3]  Joel Grodstein,et al.  Automatic detection of MOS synchronizers for timing verification , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[4]  Joel Grodstein,et al.  Constraint identification for timing verification , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[5]  R. Dutta,et al.  Multilayer area routing algorithm as an optimization problem , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[6]  Randal E. Bryant,et al.  COSMOS: a compiled simulator for MOS circuits , 1987, DAC '87.

[7]  John F. Brown,et al.  NVAX and NVAX+: single-chip CMOS VAX microprocessors , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[8]  Vivek Raghavan,et al.  AWEsim: a program for the efficient analysis of linear(ized) circuits , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[9]  Walker Anderson.  Logical verification of the NVAX CPU chip design , 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

[10]  Jerry P. Hwang,et al.  REX - A VLSI parasitic extraction tool for electromigration and signal analysis , 1991, 28th ACM/IEEE Design Automation Conference.