Below 10 ps/gate operation with buried p-layer SAINT FETs
暂无分享,去创建一个
K. Yamasaki | N. Kato | M. Hirayama | K. Yamasaki | M. Hirayama | N. Kato
[1] K. Yamasaki,et al. EB-Writing n+self-aligned GaAs MESFETs for high-speed LSIs , 1982, 1982 International Electron Devices Meeting.
[2] Tomoko Mizutani,et al. Self-align implantation for n+-layer technology (SAINT) for high-speed GaAs ICs , 1982 .