论文信息 - Below 10 ps/gate operation with buried p-layer SAINT FETs

Below 10 ps/gate operation with buried p-layer SAINT FETs

GaAs SAINT FETs with a p-layer buried under the active layer have achieved below 10 ps/gate (9.9 ps/gate) operation for the first time in semiconductor devices. The p-layer formed by Be+ implantation is completely depleted by the built-in potential. It has successfully alleviated the short channel effects without increasing parastic capacitance.

[1] K. Yamasaki,et al. EB-Writing n+self-aligned GaAs MESFETs for high-speed LSIs , 1982, 1982 International Electron Devices Meeting.

[2] Tomoko Mizutani,et al. Self-align implantation for n+-layer technology (SAINT) for high-speed GaAs ICs , 1982 .