论文信息 - Compact inverse discrete cosine transform circuit for MPEG video decoding

Compact inverse discrete cosine transform circuit for MPEG video decoding

The discrete cosine transform (DCT) and its inverse transform (IDCT) are essential computations in many signal processing applications. IDCT, specifically, is used to decompress MPEG video bitstreams and, therefore, needs to be computed inside cost-sensitive end-user units. This paper presents a very compact IDCT design based on digit-serial arithmetic techniques and the even/odd decomposition algorithm. This IDCT design has been synthesized in a 0.35 /spl mu/m gate array technology, and requires 4,600 gates plus 1,024 bits of memory. It processes 26 million pixels/sec, and has been simulated to meet the precision and dynamic range requirements of MPEG. Because of its digit-serial construction, the design can be scaled to produce efficient circuits to meet different data width and processing rate requirements.

P. Landman | C.-Yu. Hung

[1] J.C. Carlach,et al. TCAD: a 27 MHz 8*8 discrete cosine transform chip , 1989, International Conference on Acoustics, Speech, and Signal Processing,.

[2] N. Ahmed,et al. Discrete Cosine Transform , 1996 .

[3] Panagiotis Tzionas,et al. A modified discrete Fourier-cosine transform algorithm and its VLSI implementation , 1994, Microprocess. Microsystems.

[4] H. J. De Man,et al. Compact NMOS building blocks and a methodology for dedicated digital filter applications , 1983 .

[5] R. Hartley,et al. Digit-Serial Computation , 1995 .

[6] Peter Pirsch,et al. VLSI architectures for video compression-a survey , 1995, Proc. IEEE.

[7] Peter A. Ruetz,et al. A 160 Mpixel/s IDCT processor for HDTV , 1992, IEEE Micro.

[8] B. Lee. A new algorithm to compute the discrete cosine Transform , 1984 .

[9] Bela Feher,et al. Efficient synthesis of distributed vector multipliers , 1993, Microprocess. Microprogramming.

[10] L. B. Jackson,et al. An approach to the implementation of digital filters , 1968 .