Specification, Synthesis and Validation of Hardware/Software Interfaces

Design based on intellectual property (IP) is emerging to close the gap between steadily increasing capacity, in terms of transistors on integrated devices, and design productivity, in terms of the number of transistors designed in a given period. However, the integration of several IP blocks into a single system on one chip makes the specification and implementation of interfaces (for example, bus interfaces and device drivers) a dominant design problem for embedded systems. There is therefore a need for effective ways of modelling, refining, and implementing communication within embedded systems. This thesis presents one approach to hardware/software interface synthesis that ranges from the specification to the implementation and validation of hardware/software interface protocols. The information required for hardware/software interface synthesis is separated into three parts: the protocol specification, information related to the operating system, and information related to the processor. From these inputs a synthesis tool generates (a) device driver functions, (b) a combination of device driver functions and a DMA controller, or (c) simulation models, depending on what the designer decides. The clean separation of information facilitates (1) efficient design space exploration with combinations of different processors, operating systems and protocols, and (2) efficient maintenance of a large number of different versions and variants of hardware/software interfaces. The three-phase validation approach is based on standard simulation methods and facilitates simulation of the interfaces at several steps during development. We keep all the simulation models consistent with both the specification and the implementation by generating the models using the same technique that is used for synthesis. Validation in several phases is justified (1) by the faster simulation of early phases (up to four times faster than late phases), and (2) by allowing both hardware designers and software developers to work in their familiar tool environments as long as possible. Protocols are specified as a grammar, which is fully independent of architecture and implementation. After the initial selection of implementation alternatives, the methods presented are fully automated. Using real-life examples we demonstrate the effectiveness of the simulation models and show that the quality of the generated code is close to handwritten quality in terms of performance, area and code size.

[1]  Axel Jantsch,et al.  HW/SW Interface Validation in IP based System Design , 1998 .

[2]  Luciano Lavagno,et al.  Hardware-software co-design of embedded systems: the POLIS approach , 1997 .

[3]  Barbara Koroušić Seljak,et al.  Efficient Task Scheduling Approach Relevant to the Hardware/Software Co-Design of Embedded System , 2000 .

[4]  Bill Lin,et al.  Synthesis of concurrent system interface modules with automatic protocol conversion generation , 1994, ICCAD.

[5]  Rolf Ernst,et al.  Scalable performance scheduling for hardware-software cosynthesis , 1995, Proceedings of EURO-DAC. European Design Automation Conference.

[6]  Donatella Sciuto,et al.  A Flexible Model for Evaluating the Behavior of Hardware/Software Systems , 1997, CODES.

[7]  Edward A. Lee,et al.  Generating compact code from dataflow specifications of multirate signal processing algorithms , 1995 .

[8]  Gaetano Borriello,et al.  Scheduling for reactive real-time systems , 1994, IEEE Micro.

[9]  Donatella Sciuto,et al.  Partitioning and Exploration Strategies in the TOSCA Co-Design Flow , 1996, CODES.

[10]  Klaus Buchenrieder,et al.  Codesign of embedded systems based on Java and reconfigurable hardware components , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[11]  A. Smailagic,et al.  Very Rapid Prototyping Of Wearable Computers: A Case Study Of Custom Versus Off-the-shelf Design Methodologies , 1997, Proceedings of the 34th Design Automation Conference.

[12]  Rolf Ernst Communication, Constraints and User Directives in COSYMA , 1994 .

[13]  Axel Jantsch,et al.  Comparison of Six Languages for System Level Descriptions of Telecom Systems , 1998 .

[14]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[15]  Melvin A. Breuer,et al.  Digital systems testing and testable design , 1990 .

[16]  Edoardo Charbon,et al.  Intellectual Property Protection Via Hierarchical Watermarking , 1998 .

[17]  ErnstRolf Codesign of Embedded Systems , 1998 .

[18]  Luciano Lavagno,et al.  Rapid-Prototyping of Embedded Systems via Reprogrammable Devices , 1998, Des. Autom. Embed. Syst..

[19]  Daniel D. Gajski,et al.  Syntax and Semantics of the SpecC Language , 1997 .

[20]  A. Richard Newton,et al.  Design and specification of embedded systems in Java using successive, formal refinement , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[21]  Petru Eles,et al.  System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search , 1997, Des. Autom. Embed. Syst..

[22]  Cristina Silvano,et al.  Power estimation of embedded systems: a hardware/software codesign approach , 1998, IEEE Trans. Very Large Scale Integr. Syst..

[23]  Mohamed Abid,et al.  COSMOS: a codesign approach for communicating systems , 1994, CODES.

[24]  Diederik Verkest,et al.  Combining software synthesis and hardware/software interface generation to meet hard real-time constraints , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[25]  Johnny Öberg,et al.  Grammar-based hardware synthesis of data communication protocols , 1996, Proceedings of 9th International Symposium on Systems Synthesis.

[26]  Marco Spuri,et al.  Implications of Classical Scheduling Results for Real-Time Systems , 1995, Computer.

[27]  Peter Marwedel,et al.  Synthesis of communicating controllers for concurrent hardware/software systems , 1998, Proceedings Design, Automation and Test in Europe.

[28]  Axel Jantsch,et al.  Refinement of HW/SW Communication Channels : Case Study and Comparision , 1998 .

[29]  Daniel D. Gajski,et al.  A retargetable, ultra-fast instruction set simulator , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[30]  Daniel P. Siewiorek,et al.  Very Rapid Prototyping of Wearable Computers: A Case Study of VuMan 3 Custom versus Off-the-Shelf Design Methodologies , 1998, Des. Autom. Embed. Syst..

[31]  Axel Jantsch,et al.  Interactive Hardware-Software Partitioning and Memory Allocation Based on Data Transfer Profiling , 1995 .

[32]  Diederik Verkest,et al.  Hardware/software co-design of digital telecommunication systems , 1997, Proc. IEEE.

[33]  Frank Vahid,et al.  A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning , 1994, EURO-DAC '94.

[34]  Axel Jantsch,et al.  Communication in Hardware/Software Embedded Systems - A Taxonomy and Problem Formulation , 1997 .

[35]  Gaetano Borriello,et al.  The Chinook hardware/software co-synthesis system , 1995 .

[36]  Alexandru Nicolau,et al.  A performance evaluator for parameterized ASIC architectures , 1994, EURO-DAC '94.

[37]  Manfred Glesner,et al.  Protocol merging: a VHDL-based method for clock cycle minimizing and protocol preserving scheduling of IO-operations , 1994, EURO-DAC '94.

[38]  Donatella Sciuto,et al.  Co-synthesis and co-simulation of control-dominated embedded systems , 2001 .

[39]  Axel Jantsch,et al.  Grammar based modelling and synthesis of device drivers and bus interfaces , 1998, Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204).

[40]  Luciano Lavagno,et al.  Models and methods for HW/SW intellectual property interfacing , 1999 .

[41]  Wayne H. Wolf,et al.  Communication synthesis for distributed embedded systems , 1995, ICCAD.

[42]  Wolfgang Rosenstiel,et al.  Prototyping of Tightly Coupled Hardware/Software-Systems , 1997, Des. Autom. Embed. Syst..

[43]  Bill Lin,et al.  Hardware/Software Communication and System Integration for Embedded Architectures , 1997, Des. Autom. Embed. Syst..

[44]  Jürgen Teich,et al.  Domain-specific interface generation from dataflow specifications , 1998, Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98).

[45]  Bengt Oelmann,et al.  Design and Performance Evaluation of Asynchronous Micropipeline Circuits for Digital Radio , 1996 .

[46]  Martyn Edwards,et al.  Logic synthesis , 1994, Microprocessors and microsystems.

[47]  Gaetano Borriello,et al.  Synthesis of the hardware/software interface in microcontroller-based systems , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

[48]  G. De Micheli,et al.  The Olympus Synthesis System for Digital Design , 1990 .

[49]  W Braunschweig,et al.  Internal Representation of Embedded Hardware-/ Software - Systems the Extended Syntaxgraph Esg , 2022 .

[50]  Ahmed Amine Jerraya,et al.  Compilation Methods for the Address Calculation Units of Embedded Processor Systems , 1997, Des. Autom. Embed. Syst..

[51]  Axel Jantsch,et al.  Hardware/software partitioning and minimizing memory interface traffic , 1994, EURO-DAC '94.

[52]  Hans Peter Amann,et al.  High-level modeling using extended timing diagrams - A formalism for the behavioral specification of digital hardware , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

[53]  Axel Jantsch,et al.  A Versatile Design Validation Environment by Means of Software Execution, Hardware Simulation, and Emulation , 1994 .

[54]  Luciano Lavagno,et al.  Hardware-Software Co-Design of Embedded Systems , 1997 .

[55]  Alberto L. Sangiovanni-Vincentelli,et al.  Automatic synthesis of interfaces between incompatible protocols , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[56]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[57]  Jifeng He,et al.  Towards a Provably Correct Hardware Implementation of Occam , 1993, CHARME.

[58]  Christer Svensson,et al.  Performance of Synchronous and Asynchronous Schemes for VLSI Systems , 1992, IEEE Trans. Computers.

[59]  Thomas H. Lee,et al.  The Design of CMOS Radio-Frequency Integrated Circuits: RF CIRCUITS THROUGH THE AGES , 2003 .

[60]  Luciano Lavagno,et al.  A Formal Specification Model for Hardware/Software Codesign , 1993 .

[61]  Johnny Öberg,et al.  Lowering power consumption in clock by using globally asynchronous locally synchronous design style , 1999, DAC '99.

[62]  Axel Jantsch,et al.  Operating system sensitive device driver synthesis from implementation independent protocol specification , 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

[63]  Ahmed Amine Jerraya,et al.  Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples , 1998, Des. Autom. Embed. Syst..

[64]  Donatella Sciuto,et al.  Co-synthesis and co-simulation of control-dominated embedded systems , 1996, Des. Autom. Embed. Syst..

[65]  S. C. Fortier,et al.  Using a systems description language for complete avionics systems , 1998, 1998 IEEE Aerospace Conference Proceedings (Cat. No.98TH8339).

[66]  Barry W. Boehm,et al.  Cost models for future software life cycle processes: COCOMO 2.0 , 1995, Ann. Softw. Eng..

[67]  Giovanni De Micheli,et al.  The Olympus synthesis system , 1990, IEEE Design & Test of Computers.

[68]  Ahmed Amine Jerraya,et al.  Interactive system-level partitioning with PARTIF , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[69]  Jörg Henkel,et al.  Hardware-software cosynthesis for microcontrollers , 1993, IEEE Design & Test of Computers.

[70]  Axel Jantsch,et al.  A software oriented approach to hardware-software co-design , 1994 .

[71]  Raul Camposano,et al.  Embedded system design , 1996, Des. Autom. Embed. Syst..

[72]  Axel Jantsch,et al.  Device Driver and DMA Controller Synthesis from HW /SW Communication Protocol Specifications , 2001, Des. Autom. Embed. Syst..

[73]  Jörg Henkel,et al.  Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis , 1994, ICCAD.

[74]  Luciano Lavagno,et al.  Embedded code optimization via common control structure detection , 1997 .

[75]  Wolfgang Rosenstiel,et al.  A method for partitioning UNITY language in hardware and software , 1994, EURO-DAC '94.

[76]  Nicolas Halbwachs,et al.  Synchronous Programming of Reactive Systems , 1992, CAV.

[77]  Anantha P. Chandrakasan,et al.  Design techniques for portable systems , 1993, 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[78]  John Forrest,et al.  A development environment for the cosynthesis of embedded software/hardware systems , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[79]  Anne Elisabeth Haxthausen,et al.  LYCOS: the Lyngby Co-Synthesis System , 1997, Des. Autom. Embed. Syst..

[80]  Axel Jantsch,et al.  Multi-phase Validation of Hardware/Software Interfaces based on Generated Simulation Models , 1998 .

[81]  Edward A. Lee,et al.  Generating compact code from dataflow specifications of multirate signal processing algorithms , 1995, IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications.

[82]  Wayne Wolf,et al.  High-Level VLSI Synthesis , 1991 .

[83]  Stephen A. Edwards,et al.  Design of embedded systems: formal models, validation, and synthesis , 1997, Proc. IEEE.

[84]  Rajesh Gupta,et al.  Hardware/software co-design , 1996, Proc. IEEE.

[85]  Harvey F. Silverman,et al.  Processor reconfiguration through instruction-set metamorphosis , 1993, Computer.

[86]  Axel Jantsch,et al.  Synthesis of DMA controllers from architecture independent descriptions of HW/SW communication protocols , 1999, Proceedings Twelfth International Conference on VLSI Design. (Cat. No.PR00013).

[87]  G. Borriello,et al.  Control generation for embedded systems based on composition of modal processes , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[88]  Kalle Tammemäe,et al.  Flexible Codesign Target Architecture for Early Prototyping of CMIST Systems , 1996, FPL.

[89]  Jianwen Zhu,et al.  Specification and Design of Embedded Systems , 1998, Informationstechnik Tech. Inform..

[90]  Ahmed Amine Jerraya,et al.  Protocol selection and interface generation for HW-SW codesign , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[91]  Edward A. Lee,et al.  Declustering: A New Multiprocessor Scheduling Technique , 1993, IEEE Trans. Parallel Distributed Syst..