Oware: Operand width Aware Redundant Execution for Whole-Processor Error Detection

As the feature size of semiconductor technology continues to shrink, high-performance microprocessors are increasingly susceptible to soft errors. Exploiting the fact that narrow-width values universally exist in applications, prior in-register duplication approaches for improving reliability of register file and other data-holding components mitigate performance cost but leave the rest of datapath highly vulnerable. This paper presents a novel whole-processor soft error detection technique to reduce performance degradation by alleviating resource racing, while providing whole-processor error detection via redundant operations. Experimental results show that the IPC of our scheme outperforms conventional symmetric redundant execution by approximately 72%.