CCII+ current conveyor based BIC monitor for I/sub DDQ/ testing of complex CMOS circuits

In this paper, a quiescent built-in current (BIC) monitor based on a second generation current conveyor CCII+ is presented. The monitor circuit minimises the power supply voltage degradation and provides a sensitive detection of defects that cause an elevated value of the I/sub DDQ/ current The proposed monitor offers an accurate current measurement and has a wide operation range. The CCII+ based current monitor is able to handle huge digital ASICs. Significant results summarising possibilities and limitations of the circuit are discussed as well. The design was implemented through Alcatel-Mietec 0.7 /spl mu/m CMOS technology and an evaluation of the prototype chips has been carried out. An experimental application of the proposed monitor in new analogue self-test structure was considered.

[1]  Joan Figueras,et al.  Proportional BIC sensor for current testing , 1992, J. Electron. Test..

[2]  Charles F. Hawkins,et al.  Electrical Characteristics and Testing Considerations for Gate Oxide Shorts in CMOS ICs , 1985, ITC.

[3]  K. Smith,et al.  A second-generation current conveyor and its applications , 1970, IEEE Transactions on Circuit Theory.

[4]  G. Pearce,et al.  Analogue IC Design: the Current Mode Approach , 1992 .

[5]  Mark W. Levi,et al.  CMOS Is Most Testable , 1981, International Test Conference.

[6]  J. K. Fidler,et al.  Analogue IC Design: the Current-Mode Approach , 1991 .

[7]  Wojciech Maly,et al.  Design of ICs applying built-in current testing , 1992, J. Electron. Test..

[8]  H. Manhaeve,et al.  Implementation of a BIC monitor in a new analog BIST structure , 1996, Digest of Papers 1996 IEEE International Workshop on IDDQ Testing.

[9]  Wojciech Maly,et al.  Built-in current testing , 1992 .

[10]  John M. Acken Testing for Bridging Faults (Shorts) in CMOS Circuits , 1983, 20th Design Automation Conference Proceedings.

[11]  Jien-Chung Lo,et al.  A 2-ns detecting time, 2- mu m CMOS built-in current sensing circuit , 1993 .

[12]  Christofer Toumazou,et al.  Analogue IC design : the current-mode approach , 1993 .

[13]  Antonio Rubio,et al.  A built-in quiescent current monitor for CMOS VLSI circuits , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

[14]  Michael D. Ciletti,et al.  QUIETEST: a quiescent current testing methodology for detecting leakage faults , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[15]  Yashwant K. Malaiya,et al.  A New Fault Model and Testing Technique for CMOS Devices , 1982, International Test Conference.

[16]  Wojciech Maly,et al.  CMOS bridging fault detection , 1990, 1991, Proceedings. International Test Conference.

[17]  Ching-Wen Hsue,et al.  Built-In Current Sensor for IDDQ Test in CMOS , 1993 .