Improving the settling time of a digital phase-lock frequency synthesizer

The settling time of a digital phase-lock frequency synthesizer is improved by using a digital time to voltage converter (DTVC) to replace the loop filter. The synthesizer is then analysed as a sampled data control system. Analysis and experimental results show that an improvement in the settling time is obtained compared with the conventional phase-lock frequency synthesizer. However, the settling time is still a function of the frequency resolution and the frequency range required.