Autocircuit: a clock edge general behavioral synthesis system with a direct path to physical datapaths
暂无分享,去创建一个
[1] Donald E. Thomas,et al. Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench , 1989 .
[2] G. Goossens,et al. Architectural synthesis for medium and high throughput signal processing with the new Cathedral environment , 1991 .
[3] Christos A. Papachristou,et al. A VLIW architecture based on shifting register files , 1993, MICRO 1993.
[4] Robert E. Tarjan,et al. Depth-First Search and Linear Graph Algorithms , 1972, SIAM J. Comput..
[5] R. Woudsma,et al. Consumer applications: a driving force for high-level synthesis of signal-processing architectures , 1992, IEEE Micro.
[6] Brian W. Kernighan,et al. An efficient heuristic procedure for partitioning graphs , 1970, Bell Syst. Tech. J..
[7] Ron Miller,et al. Behavioral Synthesis Methodology for HDL-Based Specification and Validation , 1995, 32nd Design Automation Conference.
[8] Alexandru Nicolau,et al. Percolation based synthesis , 1991, DAC '90.
[9] Arun K. Majumdar,et al. Allocation of multiport memories in data path synthesis , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[10] Peter Duzy,et al. High-level synthesis from VHDL with exact timing constraints , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[11] Raul Camposano,et al. Path-based scheduling for synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[12] Robert A. Walker,et al. A Survey of high-level synthesis systems , 1991 .