Energy-efficient scheduling on multi-FPGA reconfigurable systems

With the growing demand in high performance computing, reconfigurable computing systems built with Field Programmable Gate Array (FPGA) have become increasingly popular for its reconfigurability and adaptability to applications. Although such systems promise high processing performance, their energy efficiency has become a critical issue. This paper studies the crucial problem of energy-efficient scheduling for reconfigurable systems with multiple FPGAs. Several factors make the energy efficient scheduling particularly challenging, including spatial allocation constraint, reconfiguration overhead, limited reconfiguration ports, and deadline satisfaction. These unique characteristics make energy efficient scheduling in multi-FPGA reconfigurable systems particularly challenging and none of existing solutions can be directly applied. This paper takes on this challenge and proposes an energy-efficient scheduling algorithm called AEE based on ant colony optimization for multi-FPGA reconfigurable systems. A task placement scheme is devised which serves as the heuristic function that derives the minimum global makespan, which is important to the ant colony algorithm based proposed in the paper. The scheme takes into account reconfiguration overhead and places tasks for reducing the overall overhead. Then, based on AEE, an enhanced algorithm (eAEE) is devised to deal with the tasks with precedence and interdependencies. To evaluate the effectiveness of the two proposed algorithms, comprehensive trace-driven simulations have been conducted and compared with other state-of-art algorithms. Experimental results demonstrate that AEE can successfully complete tasks without violating deadline constraints and the energy dissipation is largely reduced, no more than 10.65% higher than the optimum when the problem scale is relatively small. Also, eAEE consumes energy 58.17% less than an improved simulated annealing algorithm (iSA) with a large problem scale.

[1]  Sascha Hunold,et al.  Evolutionary Scheduling of Parallel Tasks Graphs onto Homogeneous Clusters , 2011, 2011 IEEE International Conference on Cluster Computing.

[2]  Tai-Yi Huang,et al.  A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem , 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

[3]  John Wawrzynek,et al.  BEE2: a high-end reconfigurable computing system , 2005, IEEE Design & Test of Computers.

[4]  Georgi Gaydadjiev,et al.  Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems , 2009, ARC.

[5]  Jason Cong,et al.  Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics , 2004, FPGA '04.

[6]  Samir I. Shaheen,et al.  Miss Ratio Improvement For Real-Time Applications Using Fragmentation-Aware Placement , 2007, 2007 IEEE International Parallel and Distributed Processing Symposium.

[7]  Yao-Wen Chang,et al.  Post-placement leakage optimization for partially dynamically reconfigurable FPGAs , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).

[8]  Michael J. Wirthlin,et al.  FPGA partial reconfiguration via configuration scrubbing , 2009, 2009 International Conference on Field Programmable Logic and Applications.

[9]  Majid Sarrafzadeh,et al.  An optimal algorithm for minimizing run-time reconfiguration delay , 2004, TECS.

[10]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[11]  Wan Yeon Lee,et al.  Energy-Efficient Scheduling of Periodic Real-Time Tasks on Lightly Loaded Multicore Processors , 2012, IEEE Transactions on Parallel and Distributed Systems.

[12]  Jürgen Teich,et al.  Heuristics for scheduling reconfigurable devices with consideration of reconfiguration overheads , 2008, 2008 IEEE International Symposium on Parallel and Distributed Processing.

[13]  Bharadwaj Veeravalli,et al.  Design of Fast and Efficient Energy-Aware Gradient-Based Scheduling Algorithms Heterogeneous Embedded Multiprocessor Systems , 2009, IEEE Transactions on Parallel and Distributed Systems.

[14]  Wayne Luk,et al.  Dynamic voltage scaling for commercial FPGAs , 2005, Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005..

[15]  Zonghua Gu,et al.  Optimal Static Task Scheduling on Reconfigurable Hardware Devices Using Model-Checking , 2007, 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07).

[16]  Xiaobo Sharon Hu,et al.  Task scheduling and voltage selection for energy minimization , 2002, DAC '02.

[17]  Qi Yang,et al.  Energy-aware partitioning for multiprocessor real-time systems , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[18]  Scott Hauck,et al.  Reconfigurable computing: a survey of systems and software , 2002, CSUR.

[19]  Tei-Wei Kuo,et al.  Energy-efficient scheduling on multi-context FPGAs , 2006, 2006 IEEE International Symposium on Circuits and Systems.

[20]  Marco Platzner,et al.  Fast online task placement on FPGAs: free space partitioning and 2D-hashing , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[21]  Nirwan Ansari,et al.  A Genetic Algorithm for Multiprocessor Scheduling , 1994, IEEE Trans. Parallel Distributed Syst..

[22]  Marco Dorigo,et al.  Optimization, Learning and Natural Algorithms , 1992 .