Current drive enhancement by using high-permittivity gate insulator in SOI MOSFET's and its limitation

Speed enhancement effects by using a high-permittivity gate insulator in SOI MOSFETs and its limitation were investigated by a two-dimensional device simulator and circuit simulator. The SOI structure is suitable to have excellent current drive by using a high-permittivity gate insulator. Although the gate capacitance increases as a function of its dielectric constant, the current drive does not increase proportionally due to the inversion capacitance. According to the simulation results of the delay time, when the pulse waveforms driven by a CMOS inverter are propagated through 1 mm-long interconnects, the delay time significantly reduces at a dielectric constant value of around 25 (Ta/sub 2/O/sub 5/). Thus, it is worthwhile using Ta/sub 2/O/sub 5/ for gate insulator to achieve high-speed operation. Furthermore, the reduction of source parasitic series resistance is a key issue to realize the highest current drive by using a high-permittivity gate insulator in SOI MOSFET.

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