InvadeSIM-A Simulation Framework for Invasive Parallel Programs and Architectures

In this chapter novel, fast, and flexible simulation techniques for modern heterogeneous NoC-based multi-core architectures are presented. They include the design and development of the full-system simulator InvadeSIM, which allows modeling complex MPSoC architectures, emulating the execution behavior of the runtime system, and simulating function and timing of invasive parallel applications apart from utilization, efficiency, and competition. A novel high-level processor simulation approach based on direct-execution and a linear timing estimation model is proposed that tackles the complexity and the heterogeneity of current multi and many-core architectures. Furthermore, a discrete-event simulation framework is presented, which allows integrating and synchronizing different simulation tasks such as software or hardware simulations. Besides processor simulation, exemplary timing models for hardware accelerators such as tightly-coupled processor arrays and special cores with instruction-set extensions are presented.