FET-R-C Circuits: A Unified Treatment—Part II: Extension to Multi-Paths, Noise Figure, and Driving-Point Impedance

In Part I of this paper, we introduce useful analysis that leads to a simple signal flow graph (SFG), which captures the FET-R-C circuit's action completely across a wide range of design parameters. Part I focuses on the analysis of a single-path FET-R-C circuit's signal transfer characteristics and gives us guidelines for sample-and-hold (S/H) and passive sampling mixer (P-M) designs. Part II extends the analysis to multi-path FET-R-C circuit configurations, e.g., a complex I-Q passive mixer that is common in RF applications. Then the noise and driving-point impedance analyses are carried out to provide valuable insights of practical S/H and P-M designs.

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