A ratio-independent algorithmic analog-to-digital converter combining current mode and dynamic techniques

An algorithmic analog-to-digital converter (ADC) that combines current mode and dynamic techniques is presented. The converter does not rely on high-gain amplifiers or well-matched components to achieve high resolution and is inherently insensitive to the amplifier's offset voltage. An analysis of the converter's limitations indicates that the resolution of practical circuits will be limited by the switch-induced charge injection. Ultimately, however, the kT/C noise leads to an area/resolution tradeoff and the transistor's thermal noise leads to a speed/power tradeoff. A prototype fabricated using a 3- mu m CMOS process achieved 10-bit resolution at a sampling rate of 25 kHz on an area of only 0.18 mm/sup 2/. >

[1]  D.J. Allstot A precision variable-supply CMOS comparator , 1982, IEEE Journal of Solid-State Circuits.

[2]  Rinaldo Castello,et al.  Performance limitations in switched-capacitor filters , 1985 .

[3]  D. G. Nairn,et al.  High-resolution, current-mode A/D convertors using active current mirrors , 1988 .

[4]  D. G. Nairn,et al.  Algorithmic analogue/digital convertor based on current mirrors , 1988 .

[5]  Blanchard D. Smith An Unusual Electronic Analog-Digital Conversion Method , 1956 .

[6]  G. Nicollini,et al.  Simulation-oriented noise model for MOS devices , 1987 .

[7]  C. A. Gobet,et al.  Spectral distribution of a sampled 1st-order lowpass filtered white noise , 1981 .

[8]  Eric A. Vittoz The Design of High-Performance Analog Circuits on Digital CMOS Chips , 1985 .

[9]  P.R. Gray,et al.  A low-noise chopper-stabilized differential switched-capacitor filtering technique , 1981, IEEE Journal of Solid-State Circuits.

[10]  P. R. Gray,et al.  Reference refreshing cyclic analog-to-digital and digital-to-analog converters , 1986 .

[11]  R. Castello,et al.  A ratio-independent algorithmic analog-to-digital conversion technique , 1984, IEEE Journal of Solid-State Circuits.

[12]  Chenming Hu,et al.  Switch-induced error voltage on a switched capacitor , 1984 .

[13]  Yannis Tsividis,et al.  Current copier cells , 1988 .

[14]  K. Smith,et al.  A second-generation current conveyor and its applications , 1970, IEEE Transactions on Circuit Theory.

[15]  D.A. Hodges,et al.  All-MOS charge-redistribution analog-to-digital conversion techniques. II , 1975, IEEE Journal of Solid-State Circuits.

[16]  H. Onodera,et al.  A cyclic A/D converter that does not require ratio-matched components , 1987, 1987 Symposium on VLSI Circuits.

[17]  W. Groeneveld,et al.  A self calibration technique for monolithic high-resolution D/A converters , 1989, IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers.

[18]  Cl.-A. Gobet,et al.  Noise analysis of switched capacitor networks , 1983 .

[19]  D. G. Nairn,et al.  Ratio-independent current mode algorithmic analog-to-digital converters , 1989, IEEE International Symposium on Circuits and Systems,.

[20]  H.J. De Man,et al.  An eight-channel 8 bit microprocessor compatible NMOS D/A converter with programmable scaling , 1980, IEEE Journal of Solid-State Circuits.

[21]  P.R. Gray,et al.  MOS operational amplifier design-a tutorial overview , 1982, IEEE Journal of Solid-State Circuits.