Implementation of concurrent checking circuits by independent sub-circuits
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[1] Bernie Mulgrew,et al. IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems , 1998 .
[2] M. Sievers. Microprogrammed control and reliable design of small computers , 1982, Proceedings of the IEEE.
[3] P. K. Lala. Self-Checking and Fault-Tolerant Digital Design , 1995 .
[4] Vl. V. Saposhnikov,et al. A New Design Method for Self-Checking Unidirectional Combinational Circuits , 1998, J. Electron. Test..
[5] Richard M. Sedmak,et al. Fault Tolerance of a General Purpose Computer Implemented by Very Large Scale Integration , 1980, IEEE Transactions on Computers.
[6] Jay M. Berger. A Note on Error Detection Codes for Asymmetric Channels , 1961, Inf. Control..
[7] Vl. V. Saposhnikov,et al. Design of self-checking unidirectional combinational circuits with low area overhead , 1996 .
[8] Bella Bose,et al. Systematic Unidirectional Error-Detecting Codes , 1985, IEEE Transactions on Computers.
[9] Niraj K. Jha,et al. Design and synthesis of self-checking VLSI circuits , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[10] Mark G. Karpovsky,et al. On-line Self-Checking of Microprogram Control Units , 2001 .
[11] Frederick F. Sellers,et al. Error detecting logic for digital computers , 1968 .
[12] Prithviraj Banerjee,et al. RSYN: a system for automated synthesis of reliable multilevel circuits , 1994, IEEE Trans. Very Large Scale Integr. Syst..
[13] Samary Baranov. CAD System for ASM and FSM Synthesis , 1998, FPL.