Asynchronous Parallel Arc Consistency Algorithms on a Distributed Memory Machine

Abstract The use of arc consistency algorithms can greatly reduce the search space of a constraint satisfaction problem by preprocessing and eliminating variable assignments which can never participate in a solution. This paper examines two variations in the frequency of communications of three parallel arc consistency algorithms on distributed memory machines. This paper also examines the effect of simple load balancing versus the more robust mean field annealing graph partitioning heuristic on speedup. Through actual machine experimentation, we compute time required for the algorithms based on such parameters as distribution of work, frequency of message passing, and load balancing. Results indicate that the configuration with less frequent communications and the robust load balancing yields the best speedup.