Multimedia enhanced general-purpose processors

This paper proposes a multimedia enhanced general purpose processor (GPP) architecture. An M/sup +/GPP enhanced architecture embodies a (regular) GPP architecture and a multimedia extension. The multimedia extension consists of a number of new multimedia dedicated instructions and (possibly new) hardware units to support their execution. Additionally, reconfigurable hardware units (RHUs) to support the execution of the new multimedia dedicated instructions are discussed. Finally, some implications of applying the M/sup +/GPP concept to the superscalar and VLIW GPP architectures are presented.

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