An Algebraic Framework for Data Abstraction in Hardware Description

The aim of this work is to extend a standard treatment of data types to a foundation for hardware synthesis. Hardware synthesis exposes several problems not typically considered in software oriented theories. These include architectural constraints in the use of type instances, parallelism in the use of multiple instances, and consolidation of distinct types in a common process. Since we are concerned with the question of incorporating (more) concrete implementations of (more) abstract types found in higher levels of specification, our foundation must address these aspects of description. The paper begins with a condensed example of a stack based processor operating on a standard memory. This specification is compared to a target description in which both the stack and the memory are implemented by a single memory process. The remainder of the paper formalizes issues raised in the example.

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