Decoupling capacitors for multi-voltage power distribution systems

Multiple power supply voltages are often used in modern high-performance ICs, such as microprocessors, to decrease power consumption without affecting circuit speed. To maintain the impedance of a power distribution system below a specified level, multiple decoupling capacitors are placed at different levels of the power grid hierarchy. The system of decoupling capacitors used in power distribution systems with multiple power supplies is described in this paper. The noise at one power supply can propagate to the other power supply, causing power and signal integrity problems in the overall system. With the introduction of a second power supply, therefore, the interaction between the two power distribution networks should be considered. The dependence of the impedance and magnitude of the voltage transfer function on the parameters of the power distribution system is investigated. An antiresonance phenomenon is intuitively explained in this paper. It is shown that the magnitude of the voltage transfer function is strongly dependent on the parasitic inductance of the decoupling capacitors, decreasing with smaller inductance. Design techniques to cancel and shift antiresonant spikes out of range of the operating frequencies are presented. It is also shown that it is highly desirable to maintain the effective series inductance of the decoupling capacitors as low as possible to decrease the overshoots of the response of the dual-voltage power distribution system over a wide range of operating frequencies. A criterion for an overshoot-free voltage response is presented in this paper. It is noted that the frequency range of the overshoot-free voltage response can be traded off with the magnitude of the response.

[1]  Eby G. Friedman,et al.  Power Distribution Networks in High Speed Integrated Circuits , 2003 .

[2]  Eby G. Friedman,et al.  Noise aware decoupling capacitors for multi-voltage power distribution systems , 2005, Sixth international symposium on quality electronic design (isqed'05).

[3]  Eby G. Friedman,et al.  Inductive properties of high-performance power distribution grids , 2002, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Miodrag Potkonjak,et al.  HYPER-LP: a system for power minimization using architectural transformations , 1992, ICCAD.

[5]  Istvan Novak,et al.  Distributed matched bypassing for board-level power distribution networks , 2002 .

[6]  Eby G. Friedman,et al.  Decoupling capacitors for power distribution systems with multiple power supply voltages , 2004, IEEE International SOC Conference, 2004. Proceedings..

[7]  Mark Horowitz,et al.  Clustered voltage scaling technique for low-power design , 1995, ISLPED '95.

[8]  Larry L. Biro,et al.  Power considerations in the design of the Alpha 21264 microprocessor , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[9]  Vivek De,et al.  Analysis of buck converters for on-chip integration with a dual supply voltage microprocessor , 2003, IEEE Trans. Very Large Scale Integr. Syst..

[10]  Larry D. Smith,et al.  Power distribution system design methodology and capacitor selection for modern CMOS technology , 1999 .

[11]  William J. Bowhill,et al.  Design of High-Performance Microprocessor Circuits , 2001 .

[12]  Anantha Chandrakasan,et al.  Embedded power supply for low-power DSP , 1997, IEEE Trans. Very Large Scale Integr. Syst..

[13]  Sani R. Nassif,et al.  Technology trends in power-grid-induced noise , 2002, SLIP '02.

[14]  Clayton R. Paul,et al.  Analysis of linear circuits , 1989 .

[15]  H. B. Bakoglu,et al.  Circuits, interconnections, and packaging for VLSI , 1990 .

[16]  Majid Sarrafzadeh,et al.  Variable voltage scheduling , 1995, ISLPED '95.

[17]  Eby G. Friedman,et al.  Noise coupling in multi-voltage power distribution systems with decoupling capacitors , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[18]  Massoud Pedram,et al.  Energy Minimization Using Multiple Supply Voltages , 1997, ISLPED.

[19]  Eby G. Friedman,et al.  Multi-Voltage CMOS Circuit Design: Kursun/Multi-Voltage CMOS Circuit Design , 2006 .

[20]  George A. Katopis,et al.  Modeling, simulation, and measurement of mid-frequency simultaneous switching noise in computer systems , 1998 .

[21]  Wolfgang Nebel,et al.  Low power design in deep submicron electronics , 1997 .

[22]  Eby G. Friedman,et al.  Impedance characteristics of decoupling capacitors in multi-power distribution systems , 2004, Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004..

[23]  Anantha P. Chandrakasan,et al.  Low-power CMOS digital design , 1992 .

[24]  L.D. Smith,et al.  Packaging and power distribution design considerations for a Sun Microsystems desktop workstation , 1997, Electrical Performance of Electronic Packaging.