Improved Interval-Based Characterization of Fixed-Point LTI Systems With Feedback Loops

Traditional approaches for fixed-point characterization are based on long simulations or additive noise models that do not show the nonlinear behavior of the quantization operations in reasonable time. In this paper, a novel interval-based approach that provides both tighter and faster results than the existing approaches is presented. It is based on a nonlinear adaptation of the quantization operations of affine arithmetic (AA). The results obtained with this method are compared to other published interval-based approaches, and the problem of interval oversizing is discussed in detail. Simulations show that: 1) the propagation techniques are not well suited to characterize the quantized linear systems with feedback loops; 2) the AA provides oversized bounds in this type of systems; and 3) the proposed adaptation does not provide guaranteed bounds as in the traditional interval-based computations, but it provides tighter estimates of the evolution in time of the ranges of the fixed-point signals and better runtime than the existing interval-based characterization techniques.

[1]  Scott Hauck,et al.  Precis: a usercentric word-length optimization tool , 2005, IEEE Design & Test of Computers.

[2]  Wayne Luk,et al.  Reconfigurable computing: architectures and design methods , 2005 .

[3]  P. Perona,et al.  Bit-width optimization for configurable DSP's by multi-interval analysis , 2000, Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154).

[4]  Heinrich Meyr,et al.  FRIDGE: an interactive code generation environment for HW/SW codesign , 1997, 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[5]  L. Jackson Roundoff-noise analysis for fixed-point digital filters realized in cascade or parallel form , 1970 .

[6]  Ian D. Walker,et al.  Interval methods for fault-tree analysis in robotics , 2001, IEEE Trans. Reliab..

[7]  Rob A. Rutenbar,et al.  Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs , 2003, ICCAD 2003.

[8]  B. Hayes,et al.  A Lucid Interval , 2003, American Scientist.

[9]  Peter Y. K. Cheung,et al.  Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits , 2006, IEEE Transactions on Circuits and Systems II: Express Briefs.

[10]  Octavio Nieto-Taladriz,et al.  Bit-width selection for data-path implementations , 1999, Proceedings 12th International Symposium on System Synthesis.

[11]  Wayne Luk,et al.  Wordlength optimization for linear digital signal processing , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Joan Carletta,et al.  Determining appropriate precisions for signals in fixed-point IIR filters , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[13]  Sanghamitra Roy,et al.  An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design , 2005, IEEE Transactions on Computers.

[14]  Yajun Ha,et al.  An automated, efficient and static bit-width optimization methodology towards maximum bit-width-to-error tradeoff with affine arithmetic model , 2006, Asia and South Pacific Conference on Design Automation, 2006..

[15]  Octavio Nieto-Taladriz,et al.  Fast characterization of the noise bounds derived from coefficient and signal quantization , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[16]  Wayne Luk,et al.  Ieee Transactions on Computer-aided Design of Integrated Circuits and Systems Accuracy Guaranteed Bit-width Optimization Abstract— We Present Minibit, an Automated Static Approach for Optimizing Bit-widths of Fixed-point Feedforward Designs with Guaranteed Accuracy. Methods to Minimize Both the In- , 2022 .

[17]  Patrick Schaumont,et al.  A methodology and design environment for DSP ASIC fixed point refinement , 1999, DATE '99.

[18]  Roumen Anguelov,et al.  Wrapping Effect and Wrapping Function , 1998, Reliab. Comput..

[19]  Markus Rupp,et al.  Automated floating-point to fixed-point conversion with the fixify environment , 2005, 16th IEEE International Workshop on Rapid System Prototyping (RSP'05).

[20]  De Figueiredo,et al.  Self-validated numerical methods and applications , 1997 .

[21]  Mark Stephenson,et al.  Bidwidth analysis with application to silicon compilation , 2000, PLDI '00.

[22]  Z. Zhao,et al.  On the generalized DFIIt structure and its state-space realization in digital filter implementation , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

[23]  Keshab K. Parhi,et al.  VLSI digital signal processing systems , 1999 .

[24]  Jianwen Zhu,et al.  Dynamic-range estimation , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[25]  Scott A. Mahlke,et al.  Bitwidth cognizant architecture synthesis of custom hardwareaccelerators , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[26]  Wonyong Sung,et al.  Simulation-based word-length optimization method for fixed-point digital signal processing systems , 1995, IEEE Trans. Signal Process..

[27]  Ranga Vemuri,et al.  Automatic data path abstraction for verification of large scale designs , 1998, Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273).

[28]  Octavio Nieto-Taladriz,et al.  Analysis of limit cycles by means of affine arithmetic computer-aided tests , 2004, 2004 12th European Signal Processing Conference.

[29]  Ian D. Walker,et al.  Extension versus Bending for Continuum Robots , 2006, ICINCO.

[30]  Ralph R. Martin,et al.  Modified Affine Arithmetic Is More Accurate than Centered Interval Arithmetic or Affine Arithmetic , 2003, IMA Conference on the Mathematics of Surfaces.

[31]  Prithviraj Banerjee,et al.  Overview of a compiler for synthesizing MATLAB programs onto FPGAs , 2004, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[32]  Robert W. Brodersen,et al.  Automated fixed-point data-type optimization tool for signal processing and communication systems , 2004, Proceedings. 41st Design Automation Conference, 2004..

[33]  Takashi Horiyama,et al.  Minimization of fractional wordlength on fixed-point conversion for high-level synthesis , 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).