10-bit programmable voltage-output digital-analog converter

This paper describes an implementation of a compact and low-power 10-bit floating-gate digital-to-analog converter (FGDAC). Nonvolatile floating-gate voltage references are utilized to build a charge amplifier DAC architecture. This novel implementation eliminates the large element spread and resolution trade-off in the traditional design of a charge amplifier voltage-output DAC. The FGDAC was fabricated in a 0.5 micrometre CMOS process and its total area is 0.0522 mm/sup 2/. The presented experimental data shows that INL and DNL values less than plus or minus 0.5 LSB (0.68 mV) are easily achievable. This structure enables digital to analog conversion with programmable linearly or nonlinearly spaced levels.

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