Impact of the electrodeposition chemistry used for TSV filling on the microstructural and thermo-mechanical response of Cu
暂无分享,去创建一个
Bart Vandevelde | Eric Beyne | Dirk Vandepitte | Mario Gonzalez | Riet Labie | Bert Verlinden | Kris Vanstreels | Chukwudi A. Okoro | Alexis Franquet | E. Beyne | A. Franquet | B. Verlinden | R. Labie | B. Vandevelde | C. Okoro | D. Vandepitte | K. Vanstreels | Mario Gonzalez
[1] Jianmin Miao,et al. Through-wafer electroplated copper interconnect with ultrafine grains and high density of nanotwins , 2007 .
[2] P. Soussan,et al. Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance , 2010, 2010 International Electron Devices Meeting.
[3] Mostafa M. Abdalla,et al. Celebrating the 100th anniversary of the Stoney equation for film stress: Developments from polycrystalline steel strips to single crystal silicon wafers , 2009 .
[4] D. Tabor. Hardness of Metals , 1937, Nature.
[6] Eric Beyne,et al. 3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV) , 2009, 2009 IEEE International Conference on 3D System Integration.
[7] Luca Benini,et al. Design Issues and Considerations for Low-Cost 3-D TSV IC Technology , 2010, IEEE Journal of Solid-State Circuits.
[8] C. Hoof,et al. Filling of microvia with an aspect ratio of 5 by copper electrodeposition , 2009 .
[9] Tong-Yi Zhang,et al. Fabrication of high aspect ratio through-wafer copper interconnects by reverse pulse electroplating , 2009 .
[10] B. Verlinden,et al. Influence of annealing conditions on the mechanical and microstructural behavior of electroplated Cu-TSV , 2010 .
[11] B. Swinnen,et al. Extraction of the Appropriate Material Property for Realistic Modeling of Through-Silicon-Vias using μ-Raman Spectroscopy , 2008, 2008 International Interconnect Technology Conference.
[12] G. Pharr,et al. The Indentation Size Effect: A Critical Examination of Experimental Observations and Mechanistic Interpretations , 2010 .
[13] Carl V. Thompson,et al. Diffusional creep in damascene Cu lines , 2001 .
[14] C. Cabral,et al. Mechanisms for microstructure evolution in electroplated copper thin films near room temperature , 1999 .
[15] J. Miao,et al. Aspect-Ratio-Dependent Copper Electrodeposition Technique for Very High Aspect-Ratio Through-Hole Plating , 2006 .
[16] Jean-Pierre Celis,et al. Changing Superfilling Mode for Copper Electrodeposition in Blind Holes from Differential Inhibition to Differential Acceleration , 2009 .
[17] P. Flinn,et al. Mechanical stress as a function of temperature in aluminum films , 1988 .
[18] H. Atkinson. Overview no. 65 , 1988 .
[19] D. Chidambarrao,et al. Numerical simulation of the X-ray stress analysis technique in polycrystalline materials under elastic loading , 1997 .
[20] Yu-Lin Shen,et al. Temperature-dependent inelastic response of passivated copper films: Experiments, analyses, and implications , 2003 .
[21] M. D. Thouless,et al. Modeling the Development and Relaxation of Stresses in Films , 1995 .
[22] P. Soussan,et al. Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance , 2010, 2010 Symposium on VLSI Technology.
[23] M. Korhonen,et al. Stress‐induced nucleation of voids in narrow aluminum‐based metallizations on silicon substrates , 1991 .