Power Estimation for Interactive 3D Game Using an Efficient Hierarchical-Based Frame Workload Prediction

In this paper we propose a novel hierarchical-based workload prediction algorithm that integrates the proportion control, integral control, derivative control, frame structure, and analysis of a game or benchmark to make game workload predictions and perform power estimation. By hierarchical analysis of a game or benchmark, one can know the complexity of a future frame of interactive 3D games in advance. Hence, the prediction error is small. Experimental results show that the proposed algorithm requires only 41.2 ms of extra workload, but provides an improvement of more than 15.7% in cycle count estimation as compared to competing algorithms.

[1]  Anand Raghunathan,et al.  Efficient power co-estimation techniques for system-on-chip design , 2000, Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537).

[2]  Ing-Jer Huang,et al.  The development of an energy-awared mobile 3D graphics SoC with real-time performance/energy monitoring and control , 2008, 2008 International SoC Design Conference.

[3]  Hoi-Jun Yoo,et al.  A 52.4mW 3D Graphics Processor with 141Mvertices/s Vertex Shader and 3 Power Domains of Dynamic Voltage and Frequency Scaling , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[4]  Christopher J. Hughes,et al.  A formal approach to frequent energy adaptations for multimedia applications , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[5]  M. Kasper graphics , 1991, Illustrating Mathematics.

[6]  Samarjit Chakraborty,et al.  Power Management of Interactive 3D Games Using Frame Structures , 2008, 21st International Conference on VLSI Design (VLSID 2008).

[7]  Xiaobo Sharon Hu,et al.  Signature-based workload estimation for mobile 3D graphics , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[8]  Samarjit Chakraborty,et al.  Control theory-based DVS for interactive 3D games , 2008, 2008 45th ACM/IEEE Design Automation Conference.

[9]  Soonhoi Ha,et al.  Dynamic voltage scheduling with buffers in low-power multimedia applications , 2004, TECS.

[10]  Jonathan D. Cohen,et al.  A relational debugging engine for the graphics pipeline , 2005, SIGGRAPH '05.

[11]  Anand Raghunathan,et al.  Power monitors: a framework for system-level power estimation using heterogeneous power models , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

[12]  Samarjit Chakraborty,et al.  A Hybrid DVS Scheme for Interactive 3D Games , 2008, 2008 IEEE Real-Time and Embedded Technology and Applications Symposium.