A hybrid NoC combining SDM-based circuit switching with packet switching for real-time applications

In this paper we propose a hybrid network-on-chip which combines Spatial Division Multiplexing “SDM”-based circuit switching and packet switching in order to efficiently and separately handle streaming and best-effort traffics generated by real-time applications. The SDM technique is used in circuit-switched sub-network in order to increase path diversity, thereby improving throughput and mitigating low resource utilization, while packet-switched sub-network is kept as simple as possible. In this way QoS is simply guaranteed without having to share resources, which often leads to a complex design. The proposed hybrid router architecture has been synthesized in FPGA and ASIC, and results show that a practical hybrid network-on-chip can then be built using the proposed approach.

[1]  Gerard J. M. Smit,et al.  A virtual channel network-on-chip for GT and BE traffic , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

[2]  Jörg Henkel,et al.  QoS-supported On-chip Communication for Multi-processors , 2007, International Journal of Parallel Programming.

[3]  Mohammad Arjomand,et al.  A hybrid packet-circuit switched on-chip network based on SDM , 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

[4]  Mikko H. Lipasti,et al.  Circuit-Switched Coherence , 2007, IEEE Comput. Archit. Lett..

[5]  Kees Goossens,et al.  AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.

[6]  Gerard J. M. Smit,et al.  An energy-efficient reconfigurable circuit-switched network-on-chip , 2005, 19th IEEE International Parallel and Distributed Processing Symposium.

[7]  Diederik Verkest,et al.  Spatial division multiplexing: a novel approach for guaranteed throughput on NoCs , 2005, 2005 Third IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'05).