RF authenticated protection scheme for SRAM-based FPGA IP cores

Field programmable gate arrays (FPGAs) have become increasingly popular due to their rapid development times and low costs. Many FPGA-based systems utilise third-party intellectual property (IP) in their development. With their increased use, the need to protect the IP against unauthorised use has become important. In this paper, we have proposed a novel wireless intellectual property protection (IPP) technique that overcomes the secure secret decryption key storage problem associated with traditional encryption-based IPP techniques that are widely used for IPP of static random access memory-based FPGA IP cores. The proposed scheme also provides an extra authentication protection for IP cores to make it more security efficient. The results derived from the testing of hardware prototype used for the evaluation of the proposed scheme are quite encouraging.

[1]  Jürgen Teich,et al.  Multiplexing methods for power watermarking , 2010, 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST).

[2]  Sandra Dominikus,et al.  Strong Authentication for RFID Systems Using the AES Algorithm , 2004, CHES.

[3]  D. Newman.  The age of intellectual property , 1987, IEEE Communications Magazine.

[4]  Tom Kean.  Secure Configuration of a Field Programmable Gate Array , 2001, The 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'01).

[5]  M. Ilyas,et al.  RFID Handbook: Applications, Technology, Security, and Privacy , 2008 .

[6]  Tom Kean,et al.  Cryptographic rights management of FPGA intellectual property cores , 2002, FPGA '02.

[7]  Jürgen Teich,et al.  Power Signature Watermarking of IP Cores for FPGAs , 2008, J. Signal Process. Syst..

[8]  Marlin H. Mickle,et al.  An automated, FPGA-based reconfigurable, low-power RFID tag , 2007, Microprocess. Microsystems.

[9]  Amr T. Abdel-Hamid,et al.  A Survey on IP Watermarking Techniques , 2004, Des. Autom. Embed. Syst..

[10]  Miodrag Potkonjak,et al.  Intellectual Property Protection in VLSI Designs: Theory and Practice , 2003 .

[11]  Boris Skoric,et al.  Read-Proof Hardware from Protective Coatings , 2006, CHES.

[12]  Tung-Sang Ng,et al.  Partial-encryption technique for intellectual property protection of FPGA-based products , 2000, IEEE Trans. Consumer Electron..

[13]  Patrick Schaumont,et al.  Offline Hardware/Software Authentication for Reconfigurable Platforms , 2006, CHES.

[14]  Yong C. Kim,et al.  Creating a unique digital fingerprint using existing combinational logic , 2009, 2009 IEEE International Symposium on Circuits and Systems.

[15]  Dennis S. Fernandez.  Intellectual Property Protection in the EDA Industry , 1994, 31st Design Automation Conference.

[16]  María José Moure,et al.  Features, Design Tools, and Application Domains of FPGAs , 2007, IEEE Transactions on Industrial Electronics.

[17]  M. Potkonjak,et al.  FPGA fingerprinting techniques for protecting intellectual property , 1998, Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).

[18]  Tim Güneysu,et al.  Dynamic Intellectual Property Protection for Reconfigurable Devices , 2007, 2007 International Conference on Field-Programmable Technology.

[19]  Marlin H. Mickle,et al.  Passive active radio frequency identification tags , 2006, Int. J. Radio Freq. Identif. Technol. Appl..