CacheTree: Reducing Integrity Verification Overhead of Secure Nonvolatile Memories
暂无分享,去创建一个
[1] Fan Yang,et al. No Compromises: Secure NVM with Crash Consistency, Write-Efficiency and High-Performance , 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).
[2] Dan Boneh,et al. Architectural support for copy and tamper resistant software , 2000, SIGP.
[3] Yan Solihin,et al. Proteus: A Flexible and Fast Software Supported Hardware Logging approach for NVM , 2017, 2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[4] Yuan Xie,et al. SuperMem: Enabling Application-transparent Secure Persistent Memory with Low Overheads , 2019, MICRO.
[5] Gennady Pekhimenko,et al. Janus: Optimizing Memory and Storage Support for Non-Volatile Memory Systems , 2019, 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA).
[6] Xuhao Chen,et al. Architecting energy-efficient STT-RAM based register file on GPGPUs via delta compression , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[7] Jose Joao,et al. Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories , 2018, 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[8] Mao Ye,et al. Osiris: A Low-Cost Mechanism to Enable Restoration of Secure Non-Volatile Memories , 2018, 2018 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[9] Jason Cong,et al. RC-NVM: Dual-Addressing Non-Volatile Memory Architecture Supporting Both Row and Column Memory Accesses , 2019, IEEE Transactions on Computers.
[10] Shay Gueron,et al. A Memory Encryption Engine Suitable for General Purpose Processors , 2016, IACR Cryptol. ePrint Arch..
[11] D. McGrew,et al. The Galois/Counter Mode of Operation (GCM) , 2005 .
[12] Samira Manabi Khan,et al. Crash Consistency in Encrypted Non-volatile Main Memory Systems , 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).
[13] Yan Solihin,et al. ObfusMem: A low-overhead access obfuscation for trusted memories , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).
[14] Rajeev Balasubramonian,et al. VAULT: Reducing Paging Overheads in SGX with Efficient Integrity Verification Structures , 2018, ASPLOS.
[15] Amro Awad,et al. Anubis: Ultra-Low Overhead and Recovery Time for Secure Non-Volatile Memories , 2019, 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA).
[16] Norman P. Jouppi,et al. Understanding the trade-offs in multi-level cell ReRAM memory design , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).
[17] Onur Mutlu,et al. Architecting phase change memory as a scalable dram alternative , 2009, ISCA '09.
[18] G. Edward Suh,et al. Caches and hash trees for efficient memory integrity verification , 2003, The Ninth International Symposium on High-Performance Computer Architecture, 2003. HPCA-9 2003. Proceedings..
[19] Brian Rogers,et al. Using Address Independent Seed Encryption and Bonsai Merkle Trees to Make Secure Processors OS- and Performance-Friendly , 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).
[20] Jongmoo Choi,et al. ThyNVM: Enabling software-transparent crash consistency in persistent memory systems , 2015, 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[21] Yan Solihin,et al. i-NVMM: A secure non-volatile main memory system with incremental encryption , 2011, 2011 38th Annual International Symposium on Computer Architecture (ISCA).
[22] Jun Yang,et al. SD-PCM: Constructing Reliable Super Dense Phase Change Memory under Write Disturbance , 2015, ASPLOS 2015.
[23] Moinuddin K. Qureshi,et al. Improving read performance of Phase Change Memories via Write Cancellation and Write Pausing , 2010, HPCA - 16 2010 The Sixteenth International Symposium on High-Performance Computer Architecture.
[24] Kartik Mohanram,et al. SECRET: Smartly EnCRypted Energy efficienT non-volatile memories , 2016, 2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC).
[25] Kartik Mohanram,et al. COVERT: Counter OVErflow ReducTion for efficient encryption of non-volatlle memories , 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.
[26] Yan Solihin,et al. Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers , 2016, ASPLOS.
[27] Michael M. Swift,et al. An Analysis of Persistent Memory Use with WHISPER , 2017, ASPLOS.
[28] Norman P. Jouppi,et al. CACTI 6.0: A Tool to Model Large Caches , 2009 .
[29] Satish Narayanasamy,et al. InvisiMem: Smart memory defenses for memory bus side channel , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).
[30] Gururaj Saileshwar,et al. SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories , 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).
[31] Kartik Mohanram,et al. ASSURE: Authentication Scheme for SecURE energy efficient non-volatile memories , 2017, 2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC).
[32] Moinuddin K. Qureshi,et al. DEUCE: Write-Efficient Encryption for Non-Volatile Memories , 2015, ASPLOS.
[33] Fang Liu,et al. Shielding STT-RAM Based Register Files on GPUs against Read Disturbance , 2016, ACM J. Emerg. Technol. Comput. Syst..
[34] Srinivas Devadas,et al. Intel SGX Explained , 2016, IACR Cryptol. ePrint Arch..
[35] Kartik Mohanram,et al. STASH: SecuriTy Architecture for Smart Hybrid Memories , 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).
[36] Onur Mutlu,et al. FIRM: Fair and High-Performance Memory Control for Persistent Memory Systems , 2014, 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture.
[37] Cong Xu,et al. NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory , 2012, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[38] John L. Henning. SPEC CPU2006 benchmark descriptions , 2006, CARN.
[39] Mao Ye,et al. Triad-NVM: Persistency for Integrity-Protected and Encrypted Non-Volatile Memories , 2019, 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA).
[40] Brian Rogers,et al. Improving Cost, Performance, and Security of Memory Encryption and Authentication , 2006, 33rd International Symposium on Computer Architecture (ISCA'06).