Large-Scale Nanoelectronic Device Simulation from First Principles

Due to the technological challenges associated with manufacturing nanoelectronic devices at atomic level and in order to avoid time-consuming and expensive experimental trials, utilizing computer-aided design and atomistic simulation tools is inevitable. Free from system-specific empirical parameterizations, density functional theory (DFT)-based quantum transport approaches can rigorously model the charge transport mechanism across nanometer-sized devices taking into account the material properties of the simulated structure, as well as the quantum mechanical e↵ects that influence the device operation at atomic-scale. Through integrating the first-principles simulation package, CP2K, and the quantum transport simulator, OMEN, and leveraging their modeling and computational strengths, we have developed an advanced massively parallel device simulator based on DFT and non-equilibrium Green’s function (NEGF) methods capable of handling realistically large nanostructures with active regions composed of thousands of atoms. Highly e cient algorithms have been implemented in OMEN for calculating open boundary conditions (OBCs) and solving the transport equations exploiting hybrid computational architectures. To evaluate the electrostatic contribution to the DFT Hamiltonian, constructed by CP2K, the Poisson equation has to be solved subject to boundary conditions specific to nano-transistors. To this end, a plane-wave (Fourier) based algorithm is proposed for solving the generalized Poisson equation with a position-dependent dielectric constant subject to periodic or homogeneous Neumann conditions on the boundaries of the simulation cell and Dirichlet type conditions imposed at arbitrarily-shaped subdomains. For all the boundary setups, consistent ionic forces have been implemented making the Poisson solver applicable to other formalisms like energy-conserving Born-Oppenheimer/Ehrenfest molecular dynamics. The capabilities of the first-principles device simulator presented in this work is demonstrated in applications such as gate-all-around (GAA) Si nanowire field-e↵ect transistors (NWFETs), Si double-gate ultra-thin-body field-e↵ect transistors (DG UTBFETs) and carbon nanotube field-e↵ect transistors (CNT-FETs) all consisting of several thousands of atoms.