Mixed-Crossing-Avoided Escape Routing of Mixed-Pattern Signals on Staggered-Pin-Array PCBs
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Tao Lin | Qian Chen | Sheqin Dong | Kan Wang | Huaxi Wang
[1] Sheqin Dong,et al. Escape routing of mixed-pattern signals based on staggered-pin-array PCBs , 2013, ISPD '13.
[2] Yao-Wen Chang,et al. A Network-Flow-Based RDL Routing Algorithmz for Flip-Chip Design , 2007, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[3] Martin D. F. Wong,et al. Recent research development in PCB layout , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[4] Tai-Chen Chen,et al. Escape routing of differential pairs considering length matching , 2012, 17th Asia and South Pacific Design Automation Conference.
[5] Alon Itai,et al. On the Complexity of Timetable and Multicommodity Flow Problems , 1976, SIAM J. Comput..
[6] Rui Shi,et al. Efficient escape routing for hexagonal array of high density I/Os , 2006, 2006 43rd ACM/IEEE Design Automation Conference.
[7] Yao-Wen Chang,et al. Area-I/O flip-chip routing for chip-package co-design , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[8] Martin D. F. Wong,et al. Network flow modeling for escape routing on staggered pin arrays , 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).
[9] Robert J. Vanderbei,et al. Linear Programming: Foundations and Extensions , 1998, Kluwer international series in operations research and management service.
[10] Martin D. F. Wong,et al. On the escape routing of differential pairs , 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).
[11] Tan Yan,et al. A correct network flow model for escape routing , 2009, 2009 46th ACM/IEEE Design Automation Conference.
[12] Wayne Wei-Ming Dai,et al. Interchangeable pin routing with application to package layout , 1996, Proceedings of International Conference on Computer Aided Design.
[13] Yao-Wen Chang,et al. Routing for chip-package-board co-design considering differential pairs , 2008, ICCAD 2008.
[14] Yao-Wen Chang,et al. Escape Routing for Staggered-Pin-Array PCBs , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[15] Yao-Wen Chang,et al. Routing for chip-package-board co-design considering differential pairs , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[16] Yao-Wen Chang,et al. Layer minimization in escape routing for staggered-pin-array PCBs , 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).
[17] Yao-Wen Chang,et al. Area-I/O flip-chip routing for chip-package co-design , 2008, ICCAD.