Effects of interface states and near interface traps on the threshold voltage stability of GaN and SiC transistors employing SiO2 as gate dielectric

This paper reports on the effects of interface states and near interface traps on the behavior of GaN and SiC transistors employing SiO2 as gate dielectric, emphasizing the role of these interfacial charged traps on the threshold voltage stability of the devices. Capacitance, conductance, and current measurements, carried out as a function of the frequency, were used to characterize the GaN- and SiC-metal-oxide-semiconductor systems. In these systems, although postoxide deposition annealing treatments reduce the interface states density, the presence of near interface traps can induce an anomalous behavior of the current conduction, accompanied by a threshold voltage instability. The transfer characteristics of the transistors acquired in an appropriate bias range enabled to quantify the density of these traps in the order of 1011 cm−2.

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