An efficient page replacement algorithm for PCM-based mobile embedded systems

Traditional embedded systems do not use virtual memory swapping but load the entire footprint into memory as they are usually single task special-purpose machines. Recently, as mobile embedded systems support multi-tasking, the necessity of swapping is becoming increasingly important. However, current mobile systems such as smartphones do not support swapping because flash memory has weaknesses to be a swap device in such environments. More recently, phase-change memory (PCM) emerges as an alternative medium for the swap device of mobile embedded systems. In this paper, we present a new page replacement algorithm for a mobile embedded system that uses PCM as a swap device. Although PCM provides high performance and byte-accessibility, its write operation is slow and it accommodates only limited endurance cycles. To cope with this situation, our algorithm tracks the dirtiness of a page at the granularity of a sub-page and replaces the least dirty page among pages not recently used, leading to reduced write traffic to PCM. Experimental results with various mobile workloads show that the proposed algorithm reduces the amount of data written to PCM by 24% on average and up to 74% compared to the well-known CLOCK algorithm. It also extends the lifetime of PCM by 50% on average.

[1]  Tajana Simunic,et al.  PDRAM: A hybrid PRAM and DRAM main memory system , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[2]  Ferdinando Bedeschi,et al.  A Multi-Level-Cell Bipolar-Selected Phase-Change Memory , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  Eunji Lee,et al.  Design and Implementation of a Journaling File System for Phase-Change Memory , 2015, IEEE Transactions on Computers.

[4]  Kern Koh,et al.  FeGC: An efficient garbage collection scheme for flash memory based storage systems , 2011, J. Syst. Softw..

[5]  Eunji Lee,et al.  Empirical Study of NVM Storage: An Operating System's Perspective and Implications , 2014, 2014 IEEE 22nd International Symposium on Modelling, Analysis & Simulation of Computer and Telecommunication Systems.

[6]  Luca Benini,et al.  Design space exploration for 3D-stacked DRAMs , 2011, 2011 Design, Automation & Test in Europe.

[7]  Hyokyung Bahn,et al.  CLOCK-DWF: A Write-History-Aware Page Replacement Algorithm for Hybrid PCM and DRAM Memory Architectures , 2014, IEEE Transactions on Computers.

[8]  C D Wright,et al.  1 Can We Reach Tbit / sq . in . Storage Densities With Phase-Change Media ? , 2004 .

[9]  Eunji Lee,et al.  Unioning of the buffer cache and journaling layers with non-volatile memory , 2013, FAST.

[10]  John L. Hennessy,et al.  WSCLOCK—a simple and effective algorithm for virtual memory management , 1981, SOSP.

[11]  Peter J. Denning,et al.  Operating Systems Theory , 1973 .